The 74HC165AP from NXP Semiconductors is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC165AP is an 8-bit parallel-load or serial-in shift registers with complementary serial outputs available from the last stage. It is designed for use in systems that require relatively moderate load power consumption and offers a balance of speed and power that makes it well-suited for a wide range of applications.
Key Features
- 8-bit serial shift register with parallel load
- Complies with JEDEC standard no. 7A
- Operating voltage range: 2.0 to 6.0 V
- Minimum shift frequency of 100 MHz at 5V
- Low power dissipation: ICC = 4 µA (max) at Ta = 25°C
- Complementary outputs
- Multiple package options
- Input levels:
- ESD protection:
- HBM JESD22-A114E exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- Latch-up performance exceeds 100 mA per JESD 78, Class II
Applications
The 74HC165AP is widely used in applications that require data to be transferred from parallel to serial form. Its applications include:
- Remote control holding registers
- Data acquisition systems
- Instrumentation and control systems
- Interface circuitry
- Microprocessor system interfacing
Product Description
The device features an 8-bit shift register that can take a parallel input or a serial input and provides a serial output. Parallel loading is accomplished by applying the eight bits of data to the Pn inputs and then making the parallel load (PL) input low. The data is loaded into the associated flip-flops and appears at the outputs after the positive transition of the clock input (CP). When PL is high, data enters the register serially at the DS input and shifts one place to the right with each positive transition of the CP. The state of each Dn input (one of eight parallel data inputs), is determined by the state of the corresponding Pn input at the time of the low-to-high transition of PL.
