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74HC573D

Part No 74HC573D
Manufacturer NXP / Nexperia
Catalog Logic - Latches
Description Latch Transparent 3-ST 8-CH D-Type 20-Pin SO / IC LATCH OCTAL D 3STATE 20SOIC
Datasheet
Sample
Rohs State rohs
ECAD Module
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Categories Integrated Circuits
Manufacturer Nexperia USA Inc.
Packaging Reel - TR
Status Active
Logic Type D-Type Transparent Latch
Output Type Tri-State
Supply Voltage - Operating 2 V to 6 V
Independent Circuits 1
Propagation Delay Time (ns) 14ns
Current - Output High, Low 7.8mA, 7.8mA
Temperature Range - Operating -40°C to 125°C
Mounting SMD (SMT)
Case / Package 20-SO
Win Source Part Number 094051-74HC573D
Is this a common-used part? Yes
Popularity High
Supply and Demand Status Sufficient
Family Name 74HC573
Introduction Date December 01, 1990
ECCN EAR99
Country of Origin China, Thailand
Halogen Free Compliant
Estimated EOL Date 2028
Ultra Librarian 3D Model Ultra Librarian 74HC573D CAD Model

Description

Product Overview: 74HC573D Octal D-Type Transparent Latch from NXP

The 74HC573D is a high-speed Si-gate CMOS device from NXP Semiconductors designed to deliver the functionality of the industry-standard 74HC logic family with the speed and robustness that modern electronic systems require. This octal D-type transparent latch is a critical component for systems that need to capture and hold data. It offers a compelling solution for a wide range of applications, including computers, communication devices, and embedded systems.

Encased in a slim SO20 package, the 74HC573D contains eight latches with 3-state outputs. Each latch is D-type, meaning it captures the state of the data input (D) on a rising edge of the clock input (CP) and retains that state until the next rising edge. The transparent nature of the latches means that when the latch enable (LE) input is high, the Q outputs will follow the data (D) inputs. When LE is taken low, the data that was present at the inputs at the time the transition occurred is retained at the outputs until the latch is enabled again.

The 3-state outputs (Q0 to Q7) are controlled by the output enable (OE) input. When OE is low, the outputs are active and reflect the data stored in the latches. When OE is high, the outputs are in a high-impedance state, effectively disconnecting them from the bus. This feature allows for direct connection to a bus system and helps in multiplexing and bus sharing applications.

Key features of the 74HC573D include:

  • Wide operating voltage range from 2.0V to 6.0V
  • High noise immunity
  • Low power consumption
  • Non-inverting outputs
  • Complies with JEDEC standard no. 7A
  • ESD protection:
    • HBM JESD22-A114E exceeds 2000V
    • MM JESD22-A115-A exceeds 200V
  • Multiple package options

With its balanced propagation delays and high noise immunity, the 74HC573D is designed for robust performance in a variety of digital circuit applications. Its compatibility with TTL levels makes it easy to integrate into mixed-technology environments, ensuring a smooth interface with both older and newer digital components. Whether used in microprocessor systems or as a buffer for data storage, the 74HC573D provides reliable and efficient operation, making it a valuable addition to your digital logic solutions.

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Pricing & Ordering

Quantity Unit Price Ext. Price
285+ $0.1759 $50.1315
610+ $0.1647 $100.4670
945+ $0.1592 $150.4440
1,355+ $0.1480 $200.5400
1,755+ $0.1425 $250.0875
2,195+ $0.1369 $300.4955
!
Prices are subject to market and will be confirmed after the order is placed.
* Prices exclude shipping and taxes. Shipping costs are calculated at checkout.
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Availability: 300,000 pieces
MOQ: 285 pcs
Order Increment : 1 pcs
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