The HD74HC113P is a high-speed silicon-gate CMOS JK flip-flop with preset and clear from Hitachi. It is manufactured using advanced CMOS technology to achieve high-speed operation while maintaining CMOS low power dissipation. This device contains two independent JK flip-flops with individual J, K, Clock, Reset, and Set inputs. Information at the J and K inputs is transferred to the Q and ~Q outputs on the positive-going edge of the clock pulse. The device has active LOW preset (PRE) and clear (CLR) inputs which operate asynchronously.

Applications:

• Shift registers
• Control registers
• Memory elements
• Counters
• Data storage

Features:

• High Speed: tpd = 13ns (typ.) at VCC = 5V
• Low Power Dissipation: ICC = 4 μA (max.) at Ta = 25°C
• High Noise Immunity: VNIH = VNIL = 28 % VCC (min.)
• Output Drive Capability: 10 LSTTL Loads
• Symmetrical Output Impedance: |IOH| = IOL = 4 mA (min.)
• Balanced Propagation Delays: tPLH ≈ tPHL
• Wide Operating Voltage Range: VCC = 2 V to 6 V
• Pin and Function Compatible with 74LS113

Benefits:

• Improved system performance due to high-speed operation.
• Reduced power consumption, making it suitable for battery-powered applications.
• Enhanced noise immunity, ensuring reliable operation in noisy environments.
• Simplified system design due to compatibility with other logic families.
• Wide operating voltage range allows usage in various application voltages.

Additional Details:

The HD74HC113P is a dual JK flip-flop with preset and clear. It is supplied in a 14-pin DIP package. The operating temperature range is -40°C to +85°C. The input capacitance is typically 5 pF.