This manual describes the IBS SRE 1A register expansion chip for the INTERBUS SUPI protocol chip family. It can be used to easily expand the data length of the protocol chips if the internal data registers are insufficient. The maximum of six additional data words can be accessed via a microprocessor. This manual and the manuals for INTERBUS SUPI protocol chips can be used to implement custom INTERBUS devices, which should be subjected to a conformance test. INTERBUS is a serial sensor/actuator bus. It comprises a central intelligent controller board (controller or IB master) in a host system and distributed I/O modules. IBS SUPI protocol chips are used for integrating I/O modules in an INTERBUS network. In this document, "IBS SUPI" refers to all INTERBUS protocol chips in the SUPI range. On the I/O side, the IBS SUPI has a multi-function interface (MFP Multi-Function Pins). Depending on the function of the INTERBUS device, the MFP interface can be configured as a direct I/O interface or as a processor interface.