Maxim Integrated's MAX6800UR31D3+T Microprocessor Reset Circuit
The MAX6800UR31D3+T is a compact, highly reliable microprocessor (μP) supervisory circuit designed by Maxim Integrated to monitor power supplies in digital systems. It ensures that the microprocessor is reset to a known state during power-up, power-down, and brown-out conditions. This tiny device is an essential component for maintaining system integrity and preventing software execution errors due to insufficient power supply voltages.
Encased in a 3-Pin SOT-23 package, the MAX6800UR31D3+T offers an active-low reset output. It has a factory preset reset threshold voltage of 3.08V, which makes it suitable for 3.3V-powered systems. The reset output remains asserted for a minimum reset timeout period of 140ms after VCC has risen above the reset threshold, providing ample time for the system to stabilize before the processor starts its operation.
One of the key features of the MAX6800UR31D3+T is its low power consumption. With a quiescent current of only 1.6μA at VCC = 3.3V, it is an excellent choice for portable and battery-powered applications where power efficiency is crucial. Moreover, the device operates over a wide voltage range from 1.2V to 5.5V, giving it the flexibility to be used in various systems with different power requirements.
Maxim Integrated has designed the MAX6800UR31D3+T with an immunity to short VCC transients, making it robust in environments where power supply noise is a concern. Additionally, the device is characterized for operation over the extended industrial temperature range of -40°C to +125°C, which allows it to be used in harsh industrial environments without compromising its performance.
The MAX6800UR31D3+T is available in a tape-and-reel form, denoted by the "+T" suffix, making it suitable for automated production processes. This product is ideal for use in applications such as computers, controllers, intelligent instruments, portable devices, and other digital systems that require a reliable reset function to ensure proper operation and system stability.